Clustering Solutions of Multiobjective Function Inlining Problem

Hard real time-systems are often small devices operating on batteries that must react within a given deadline, so they must satisfy their timing, code size, and energy consumption requirements. Since these three objectives contradict each other, compilers for real-time systems go towards multiobjective optimizations which result in sets of trade-off solutions. A system designer can use the solution sets to choose the most suitable system configuration. Evolutionary algorithms can find trade-off solutions but the solution set might be large which complicates the task of the system designer. We propose to divide the solution set into clusters, so the system designer chooses the most suitable cluster and examines a smaller subset in detail. In contrast to other clustering techniques, our method guarantees that the sizes of all clusters are less than a predefined limit. Our method clusters a set by using any existing clustering method, divides clusters with sizes exceeding the predefined size into smaller clusters, and reduces the number of clusters by merging small clusters. The method guarantees that the final clusters satisfy the size constraint. We demonstrate our approach by considering a well-known compiler-based optimization called function inlining. It substitutes function calls by the function bodies which decreases the execution time and energy consumption of a program but increases its code size

Efficient and Effective Multi-Objective Optimization for Real-Time Multi-Task Systems

Embedded real-time multi-task systems must often not only comply with timing constraints but also need to meet energy requirements. However, optimizing energy consumption might lead to higher Worst-Case Execution Time (WCET), leading to an un-schedulable system, as frequently executed code can easily differ from timing-critical code. To handle such an impasse in this paper, we formulate a Metaheuristic Algorithm-based Multi-objective Optimization (MAMO) for multi-task real-time systems. But, performing multiple WCET, energy, and schedulability analyses to solve a MAMO poses a bottleneck concerning compilation times. Therefore, we propose two novel approaches - Path-based Constraint Approach (PCA) and Impact-based Constraint Approach (ICA) - to reduce the solution search space size and to cope with this problem. Evaluations showed that PCA and ICA reduced compilation times by 85.31% and 77.31%, on average, over MAMO. For all the task sets, out of all solutions found by ICA-FPA, on average, 88.89% were on the final Pareto front

Cache-Aware Instruction SPM Allocation for Hard Real-Time Systems

To improve the execution time of a program, parts of its instructions can be allocated to a fast Scratchpad Memory (SPM) at compile time. This is a well-known technique which can be used to minimize the program's worst-case Execution Time (WCET). However, modern embedded systems often use cached main memories. An SPM allocation will inevitably lead to changes in the program's memory layout in main memory, resulting in either improved or degraded worst-case caching behavior. We tackle this issue by proposing a cache-aware SPM allocation algorithm based on integer-linear programming which accounts for changes in the worst-case cache miss behavior

Loop Nest Splitting for WCET-Optimization and Predictability Improvement

This paper presents the influence of the loop nest splitting source code optimization on the worst-case execution time (WCET). Loop nest splitting minimizes the number of executed if-statements in loop nests of embedded multimedia applications. Especially loops and if-statements of high-level languages are an inherent source of unpredictability and loss of precision for WCET analysis. This is caused by the fact that it is difficult to obtain safe and tight worst-case estimates of an application\u27s flow of control through these high-level constructs. In addition, the corresponding control flow redirections expressed at the assembly level reduce predictability even more due to the complex pipeline and branch prediction behavior of modern embedded processors. The analysis techniques for loop nest splitting are based on precise mathematical models combined with genetic algorithms. On the one hand, these techniques achieve a significantly more homogeneous structure of the control flow. On the other hand, the precision of our analyses leads to the generation of very accurate high-level flow facts for loops and if-statements. The application of our implemented algorithms to three real-life multimedia benchmarks leads to average speed-ups by 25.0% - 30.1%, while WCET is reduced between 34.0% and 36.3%

Design of a WCET-Aware C Compiler

This paper presents techniques to tightly integrate worst-case execution time information into a compiler framework. Currently, a tight integration of WCET information into the compilation process is strongly desired, but only some ad-hoc approaches have been reported currently. Previous publications mainly used self-written WCET estimators with very limited functionality and preciseness during compilation. A very tight integration of a high quality industry-relevant WCET analyzer into a compiler was not yet achieved up to now. This work is the first to present techniques capable of achieving such a tight coupling between a compiler and the WCET analyzer aiT. This is done by automatically translating the assembly-like contents of the compiler\u27s low-level intermediate representation (LLIR) to aiT\u27s exchange format CRL2. Additionally, the results produced by the WCET analyzer are automatically collected and re-imported into the compiler infrastructure. The work described in this paper is smoothly integrated into a C compiler environment for the Infineon TriCore processor. It opens up new possibilities for the design of WCET-aware optimizations in the future. The concepts for extending the compiler infrastructure are kept very general so that they are not limited to WCET information. Rather, it is possible to use our structures also for multi-objective optimization of e.g. best-case execution time (BCET) or energy dissipation

Rankings von Umwelterklärungen: Systeme mit Schwachstellen

Bewertende Vergleiche von Umwelterklärungen (Rankings) entfalten dann eine umweltschutzfördernde Wirkung, wenn sie in der Öffentlichkeit und bei betroffenen Unternehmen auf Akzeptanz stoßen. Voraussetzung hierzu ist ein ausdifferenziertes und zugleich leicht nachvollziehbares Bewertungssystem. Bisher veröffentlichte Öko-Rankings weisen hier noch einige Schwächen auf

Nanostructure-modulated planar high spectral resolution spectro-polarimeter

We present a planar spectro-polarimeter based on Fabry-P{\'e}rot cavities with embedded polarization-sensitive high-index nanostructures. A $7~\mu$m-thick spectro-polarimetric system for 3 spectral bands and 2 linear polarization states is experimentally demonstrated. Furthermore, an optimal design is theoretically proposed, estimating that a system with a bandwidth of 127~nm and a spectral resolution of 1~nm is able to reconstruct the first three Stokes parameters \textcolor{black}{with a signal-to-noise ratio of -13.14~dB with respect to the the shot noise limited SNR}. The pixelated spectro-polarimetric system can be directly integrated on a sensor, thus enabling applicability in a variety of miniaturized optical devices, including but not limited to satellites for Earth observation

Datengenerierung in Automationsgeräten, Datenintegration und Visualisierung in CPS-Leitständen

Der durchgängige Einsatz von ETHERNET-Technologien in der Industrie ermöglicht den Durchgriff auf Daten von der (Werks-)Leitebene bis in die Feldebene (Aktoren und Sensoren). Die Realisierung dieser Funktionen bedarf struktureller und funktioneller Festlegungen und Normative, an die Entwickler und Nutzer zu binden sind. Die konzipierten und umgesetzten Daten-Erfassungs-, -Übertragungs- und -Visualisierungskonzepte konnten in ihrer Funktionsfähigkeit demonstratorhaft nachgewiesen werden. Eine Anpassung auf weitere Technologien ist möglich und im Zuge der Weiterentwicklung in Richtung Vermarktbarkeit vorgesehen

Reasoning about non-functional properties using compiler intrinsic function annotations

Funding: European Union’s Horizon 2020 research and innovation programme under grant agreement No 779882.Embedded systems often need to adhere to time and energy constraints. With the increasing popularity of embed-ded systems, the interest in evaluating and optimizing non-functional properties like execution time and energy of these systems is increasing. In this paper, we describe a Resource-usage Estimate Expression Language (REEL), which allows the user to arguea bout these properties, within the source code, in a compiler understandable manner. Furthermore, we discuss the integration of REEL within a compiler framework. We, also show the propagation of REEL annotations within the compiler, and how they can be exploited to make decisions based on the non-functional properties within the source code. Finally, we explore REEL’s potential to perform ILP-based optimizations.Postprin